Fast squareroot extractor 
Fast squareroot extractor 
We want to get rid of the carry propagation thanks to the use of the "BS" notation, the same "head" and "tail" cells and an architecture similar to the fast division. We bump into three difficulties when trying to use the fast divider for extraction of square roots. 
Square root converter 
The first difficulty is the root feedback. Like the division circuit, the extractor supplies a partial root Q_{j}
in "BS" notation ( '0', '1' and '1'
). On the other hand, the "head" and "tail" cell of the divider only accepts a partial root
in conventional binary representation ( '0' and '1' ). A
subtractor could be used to convert each Q_{j} from "BS" to conventional, but that would be at
the same time slow and expensive. The converter below use a 4input, 2output "trc" cell, derived from
the "BK" cell and takes advantage of the delayed inputs. This circuit has another interest : it gives the input Q converted from "BS" to binary. Besides it gives another output Qm = Q_{0} – 1. If the final remainder of the carrypropagationfree extraction is negative, that means that Q is too large (by 1) and Qm is the actual root value, otherwise Q_{0} is the root value. 
Square root conversion cell 
Check whether you are acquainted with the logic of the "trc" cell, which convert "on the fly"
from "BS" notation into standard binary notation.

Carrypropagation free square root extractor 
The fast squareroot extractor makes use of the same cell as the fast divider to execute at each step one of the following arithmetic operations:
The second difficulty with respect to division lies in the subtraction of 2^{2j1 }whenever q_{j} =
'1' or q_{j} = '1' . Those cases are detected
by an "or" gate the output of which is connected to a negative input of the least significant "tail" cell of each row. 
Each "head" cell selects the value of one digit q_{j} thanks to the sign of an estimate _{2j} of the current remainder R_{2j}. The third and last difficulty is lying in the range. Indeed each Q_{j} must start with a "1" in the most significant position (implicit). This condition is fulfilled if the two most significant bits of the radicand A are not both zero. In other word, A must be "normalized". This "1" is subtracted once from A in the first row thanks to a negative "head" input. 
The root value Q is output at the left in "BS" notation and at the bottom as well in standard binary representation. 
Divider and square root extractor 
The same circuit can execute either the division or the square root extraction thanks to multiplexers "2 Þ1" inserted into the inputs of some "tail" cells. The first arrows "view" switch around the connections of the inputs of about half of the "tail" cells therefore selecting division or extraction. The second arrow changes the view. For clarity the converter is not drawn for division, but it is always connected to Q and supplies either the quotient or the root in standard binary notation. 